The following conventions are used in syntax description:
Notation Description {0..N} Any integer value in the range from 0 to N (inclusive). Unless stated otherwise, this value may be specified as either a literal or an llvm expression. <x> Syntax and meaning of <x> is explained elsewhere.
Specifies an immediate unsigned 8-bit offset, in bytes. The default value is 0.
Used with DS instructions which have 2 addresses.
Syntax Description offset:{0..0xFF} Specifies a 8-bit offset.
Specifies an immediate unsigned 16-bit offset, in bytes. The default value is 0.
Used with DS instructions which have 1 address.
Syntax Description offset:{0..0xFFFF} Specifies a 16-bit offset.
This is a special modifier which may be used with ds_swizzle_b32 instruction only. Specifies a sizzle pattern in numeric or symbolic form. The default value is 0.
See AMD documentation for more information.
Syntax Description offset:{0..0xFFFF} Specifies a 16-bit swizzle pattern in a numeric form. offset:swizzle(QUAD_PERM,{0..3},{0..3},{0..3},{0..3}) Specifies a quad permute mode pattern; each number is a lane id. offset:swizzle(BITMASK_PERM, “<mask>”) Specifies a bitmask permute mode pattern which converts a 5-bit lane id to another lane id with which the lane interacts.
<mask> is a 5 character sequence which specifies how to transform the bits of the lane id. The following characters are allowed:
- “0” - set bit to 0.
- “1” - set bit to 1.
- “p” - preserve bit.
- “i” - inverse bit.
offset:swizzle(BROADCAST,{2..32},{0..N}) Specifies a broadcast mode. Broadcasts the value of any particular lane to all lanes in its group.
The first numeric parameter is a group size and must be equal to 2, 4, 8, 16 or 32.
The second numeric parameter is an index of the lane being broadcasted. The index must not exceed group size.
offset:swizzle(SWAP,{1..16}) Specifies a swap mode. Swaps the neighboring groups of 1, 2, 4, 8 or 16 lanes. offset:swizzle(REVERSE,{2..32}) Specifies a reverse mode. Reverses the lanes for groups of 2, 4, 8, 16 or 32 lanes.
Specifies if this is the last export from the shader to the target. By default, current instruction does not finish an export sequence.
Syntax Description done Indicates the last export operation.
Specifies an immediate unsigned 12-bit offset, in bytes. The default value is 0.
Cannot be used with global/scratch opcodes. GFX9 only.
Syntax Description offset:{0..4095} Specifies a 12-bit unsigned offset.
Specifies an immediate signed 13-bit offset, in bytes. The default value is 0.
Can be used with global/scratch opcodes only. GFX9 only.
Syntax Description offset:{-4096..+4095} Specifies a 13-bit signed offset.
Specifies which channels (image components) are used by the operation. By default, no channels are used.
Syntax Description dmask:{0..15} Each bit corresponds to one of 4 image components (RGBA). If the specified bit value is 0, the component is not used, value 1 means that the component is used.
This modifier has some limitations depending on instruction kind:
Instruction Kind Valid dmask Values 32-bit atomic cmpswap 0x3 other 32-bit atomic instructions 0x1 64-bit atomic cmpswap 0xF other 64-bit atomic instructions 0x3 GATHER4 0x1, 0x2, 0x4, 0x8 Other instructions any value
Specifies whether address is normalized or not (normalized by default).
Syntax Description unorm Force address to be un-normalized.
Specifies texture resource size. The default size is 256 bits.
GFX7 and GFX8 only.
Syntax Description r128 Specifies 128 bits texture resource size.
Specifies LOD warning status (LOD warning is disabled by default).
Syntax Description lwe Enables LOD warning.
Specifies if an array index must be sent to TA. By default, array index is not sent.
Syntax Description da Send an array-index to TA.
Specifies data size: 16 or 32 bits (32 bits by default). Not supported by GFX7.
Syntax Description d16 Enables 16-bits data mode.
On loads, convert data in memory to 16-bit format before storing it in VGPRs.
For stores, convert 16-bit data in VGPRs to 32 bits before going to memory.
Note that 16-bit data are stored in VGPRs unpacked in GFX8.0. In GFX8.1 and GFX9 16-bit data are packed.
This modifier has different meaning for loads, stores, and atomic operations. The default value is off (0).
See AMD documentation for details.
Syntax Description glc Set glc bit to 1.
Specifies cache policy. The default value is off (0).
See AMD documentation for details.
Syntax Description slc Set slc bit to 1.
Specifies whether address components include an index. By default, no components are used.
Can be used together with offen.
Cannot be used with addr64.
Syntax Description idxen Address components include an index.
Specifies whether address components include an offset. By default, no components are used.
Can be used together with idxen.
Cannot be used with addr64.
Syntax Description offen Address components include an offset.
Specifies whether a 64-bit address is used. By default, no address is used.
GFX7 only. Cannot be used with offen and idxen modifiers.
Syntax Description addr64 A 64-bit address is used.
Specifies an immediate unsigned 12-bit offset, in bytes. The default value is 0.
Syntax Description offset:{0..0xFFF} Specifies a 12-bit unsigned offset.
GFX8 and GFX9 only.
Specifies how data are shared between threads. This is a mandatory modifier. There is no default value.
Note. The lanes of a wavefront are organized in four banks and four rows.
Syntax Description quad_perm:[{0..3},{0..3},{0..3},{0..3}] Full permute of 4 threads. row_mirror Mirror threads within row. row_half_mirror Mirror threads within 1/2 row (8 threads). row_bcast:15 Broadcast 15th thread of each row to next row. row_bcast:31 Broadcast thread 31 to rows 2 and 3. wave_shl:1 Wavefront left shift by 1 thread. wave_rol:1 Wavefront left rotate by 1 thread. wave_shr:1 Wavefront right shift by 1 thread. wave_ror:1 Wavefront right rotate by 1 thread. row_shl:{1..15} Row shift left by 1-15 threads. row_shr:{1..15} Row shift right by 1-15 threads. row_ror:{1..15} Row rotate right by 1-15 threads.
Controls which rows are enabled for data sharing. By default, all rows are enabled.
Note. The lanes of a wavefront are organized in four banks and four rows.
Syntax Description row_mask:{0..15} Each of 4 bits in the mask controls one row (0 - disabled, 1 - enabled).
Controls which banks are enabled for data sharing. By default, all banks are enabled.
Note. The lanes of a wavefront are organized in four banks and four rows.
Syntax Description bank_mask:{0..15} Each of 4 bits in the mask controls one bank (0 - disabled, 1 - enabled).
Controls data sharing when accessing an invalid lane. By default, data sharing with invalid lanes is disabled.
Syntax Description bound_ctrl:0 Enables data sharing with invalid lanes. Accessing data from an invalid lane will return zero.
GFX8 and GFX9 only.
Selects which bits in the destination are affected. By default, all bits are affected.
Syntax Description dst_sel:DWORD Use bits 31:0. dst_sel:BYTE_0 Use bits 7:0. dst_sel:BYTE_1 Use bits 15:8. dst_sel:BYTE_2 Use bits 23:16. dst_sel:BYTE_3 Use bits 31:24. dst_sel:WORD_0 Use bits 15:0. dst_sel:WORD_1 Use bits 31:16.
Controls what to do with the bits in the destination which are not selected by dst_sel. By default, unused bits are preserved.
Syntax Description dst_unused:UNUSED_PAD Pad with zeros. dst_unused:UNUSED_SEXT Sign-extend upper bits, zero lower bits. dst_unused:UNUSED_PRESERVE Preserve bits.
Controls which bits in the src0 are used. By default, all bits are used.
Syntax Description src0_sel:DWORD Use bits 31:0. src0_sel:BYTE_0 Use bits 7:0. src0_sel:BYTE_1 Use bits 15:8. src0_sel:BYTE_2 Use bits 23:16. src0_sel:BYTE_3 Use bits 31:24. src0_sel:WORD_0 Use bits 15:0. src0_sel:WORD_1 Use bits 31:16.
Controls which bits in the src1 are used. By default, all bits are used.
Syntax Description src1_sel:DWORD Use bits 31:0. src1_sel:BYTE_0 Use bits 7:0. src1_sel:BYTE_1 Use bits 15:8. src1_sel:BYTE_2 Use bits 23:16. src1_sel:BYTE_3 Use bits 31:24. src1_sel:WORD_0 Use bits 15:0. src1_sel:WORD_1 Use bits 31:16.
Operand modifiers are not used separately. They are applied to source operands.
GFX8 and GFX9 only.
Selects the low [15:0] or high [31:16] operand bits for source and destination operands. By default, low bits are used for all operands.
The number of values specified with the op_sel modifier must match the number of instruction operands (both source and destination). First value controls src0, second value controls src1 and so on, except that the last value controls destination. The value 0 selects the low bits, while 1 selects the high bits.
Note. op_sel modifier affects 16-bit operands only. For 32-bit operands the value specified by op_sel must be 0.
GFX9 only.
Syntax Description op_sel:[{0..1},{0..1}] Select operand bits for instructions with 1 source operand. op_sel:[{0..1},{0..1},{0..1}] Select operand bits for instructions with 2 source operands. op_sel:[{0..1},{0..1},{0..1},{0..1}] Select operand bits for instructions with 3 source operands.
Clamp meaning depends on instruction.
For v_cmp instructions, clamp modifier indicates that the compare signals if a floating point exception occurs. By default, signaling is disabled. Not supported by GFX7.
For integer operations, clamp modifier indicates that the result must be clamped to the largest and smallest representable value. By default, there is no clamping. Integer clamping is not supported by GFX7.
For floating point operations, clamp modifier indicates that the result must be clamped to the range [0.0, 1.0]. By default, there is no clamping.
Note. Clamp modifier is applied after output modifiers (if any).
Syntax Description clamp Enables clamping (or signaling).
Specifies if an output modifier must be applied to the result. By default, no output modifiers are applied.
Note. Output modifiers are applied before clamping (if any).
Output modifiers are valid for f32 and f64 floating point results only. They must not be used with f16.
Note. v_cvt_f16_f32 is an exception. This instruction produces f16 result but accepts output modifiers.
Syntax Description mul:2 Multiply the result by 2. mul:4 Multiply the result by 4. div:2 Multiply the result by 0.5.
Operand modifiers are not used separately. They are applied to source operands.
This section describes modifiers of regular VOP3P instructions. v_mad_mix modifiers are described in a separate section.
GFX9 only.
Selects the low [15:0] or high [31:16] operand bits as input to the operation which results in the lower-half of the destination. By default, low bits are used for all operands.
The number of values specified with the op_sel modifier must match the number of source operands. First value controls src0, second value controls src1 and so on. The value 0 selects the low bits, while 1 selects the high bits.
Syntax Description op_sel:[{0..1}] Select operand bits for instructions with 1 source operand. op_sel:[{0..1},{0..1}] Select operand bits for instructions with 2 source operands. op_sel:[{0..1},{0..1},{0..1}] Select operand bits for instructions with 3 source operands.
Selects the low [15:0] or high [31:16] operand bits as input to the operation which results in the upper-half of the destination. By default, high bits are used for all operands.
The number of values specified with the op_sel_hi modifier must match the number of source operands. First value controls src0, second value controls src1 and so on. The value 0 selects the low bits, while 1 selects the high bits.
Syntax Description op_sel_hi:[{0..1}] Select operand bits for instructions with 1 source operand. op_sel_hi:[{0..1},{0..1}] Select operand bits for instructions with 2 source operands. op_sel_hi:[{0..1},{0..1},{0..1}] Select operand bits for instructions with 3 source operands.
Specifies whether to change sign of operand values selected by op_sel. These values are then used as input to the operation which results in the upper-half of the destination.
The number of values specified with this modifier must match the number of source operands. First value controls src0, second value controls src1 and so on.
The value 0 indicates that the corresponding operand value is used unmodified, the value 1 indicates that negative value of the operand must be used.
By default, operand values are used unmodified.
This modifier is valid for floating point operands only.
Syntax Description neg_lo:[{0..1}] Select affected operands for instructions with 1 source operand. neg_lo:[{0..1},{0..1}] Select affected operands for instructions with 2 source operands. neg_lo:[{0..1},{0..1},{0..1}] Select affected operands for instructions with 3 source operands.
Specifies whether to change sign of operand values selected by op_sel_hi. These values are then used as input to the operation which results in the upper-half of the destination.
The number of values specified with this modifier must match the number of source operands. First value controls src0, second value controls src1 and so on.
The value 0 indicates that the corresponding operand value is used unmodified, the value 1 indicates that negative value of the operand must be used.
By default, operand values are used unmodified.
This modifier is valid for floating point operands only.
Syntax Description neg_hi:[{0..1}] Select affected operands for instructions with 1 source operand. neg_hi:[{0..1},{0..1}] Select affected operands for instructions with 2 source operands. neg_hi:[{0..1},{0..1},{0..1}] Select affected operands for instructions with 3 source operands.
These instructions use VOP3P format but have different modifiers.
GFX9 only.
This operand has meaning only for 16-bit source operands as indicated by mad_mix_op_sel_hi. It specifies to select either the low [15:0] or high [31:16] operand bits as input to the operation.
The value 0 indicates the low bits, the value 1 indicates the high 16 bits. By default, low bits are used for all operands.
Syntax Description op_sel:[{0..1},{0..1},{0..1}] Select location of each 16-bit source operand.
Selects the size of source operands: either 32 bits or 16 bits. By default, 32 bits are used for all source operands.
The value 0 indicates 32 bits, the value 1 indicates 16 bits. The location of 16 bits in the operand may be specified by mad_mix_op_sel.
Syntax Description op_sel_hi:[{0..1},{0..1},{0..1}] Select size of each source operand.